MSC8156ESVT1000B High-performance six-core DSP
MSC8156 is based on the industry's highest performance DSP core built-in StarCore technology and designed advanced processing requirements and capabilities for today's high-performance applications in the wireless broadband, medical imaging, aerospace, defense and advanced test and measurement markets. It offers industry-leading performance and power consumption, leveraging 45nm process technology to deliver a single-core device with performance equivalent to 6 GHz in a highly integrated system-on-chip (SoC). The MSC8156 helps device manufacturers create end products and services that integrate more functionality in a smaller hardware footprint. MSC8156 DSP offers a high level of performance and integration, combined with 6 fully programmable and enhanced SC3850 DSP cores, each running at up to 1 GHz. Developed and integrated on-chip by Freescale, the MAPLE-B accelerator supports hardware-accelerated Turbo and Viterbi channel decoding and DFT/IDFT and FFT/IFFT algorithms. The high-performance internal RISC-based QUICC Engine subsystem supports multiple network protocols to guarantee reliable data transmission over packet networks while significantly offloading the DSP cores processed. MSC8156 embeds high-capacity memory and supports a variety of advanced high-speed interface types, including two RapidIO® interfaces, two Gigabit Ethernet interfaces for network communication, a PCI Express® controller, two high-speed, industry-standard memory interfaces for DDR controllers, and four multi-channel TDM interfaces. MSC8156 pin-compatible with all MSC825x and MSC815x DSP devices, allowing for a high degree of scalability. --------------------------------------------------------------------------------Peculiarity-------------------------------------------------------------------------------- Six StarCore SC3850 DSP core subsystems, each featuring: SC3850 DSP core, 512 KB unified L2 cache/M2 memory at up to 1 GHz, 32 KB I-cache, 32 KB D-cache fully programmable 1056 KB M3 shared memory (SRAM) MAPLE-B - highly flexible programmable Turbo and Viterbi decoders support configurable decoding parameters. It can perform Turbo code decoding up to 200 Mbps (6 iterations), or up to 115 Mbps K=9 (zero-tail) viterratio decoding of two DDR 2/3 64-bit SDRAM interfaces, chip-level arbitration at data rates up to 800 MHz, non-blocking switching structure, fully pipelined, low-latency high-speed interconnect PCI Express 4x/ 1x Two SGMII32 GPIO 16-bit Timer Technical Process: 45nm SOI Voltage: 1, 2.5 volt core, 1.8/1.5-volt I/O Packing method: FC-BPGA (29x29) 1 mm pitch, RoHS compliant
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