SN74HC165PW

illustrate

The HC165 device is an 8-bit parallel loading shift register, when clock, shift) output data to serial (ask_{H standard}。 Parallel data entered directly at each stage is made up of eight people (Labour DepartmentAh)/input, (Shanghai will enable a low level of transition/load. The HC165 device also has a clock rejection (CLK isoniazid) function and complementary sequences（ask_highoutput.

The clock is via an input to the CLK INH (CLK) that is kept low to high at the same timeLabour DepartmentAloft. The functions of CLK and CLK of isoniazid are interchangeable. Since low CLK and CLK isoniazid also complete the clock with a low to high transition to a transition, the clock isoniazid should be changed to only at high levels of CLK for high.

characteristic

• Wide operating voltage range of 2 V to 6 V
• The output can drive up to 10 input channel loads
• Low power consumption, 80μA maximum ICC
• Typical T = 13 ns_palladium
• The output of ± 4 - mA drives 5 V
• The low input current is 1μA maximum
• Complementary outputs
• Directly override the payload (data) input
• Gated clock input
• Parallel to serial data conversion