TPS53128

illustrate

The TPS53128 is a dual-channel, time-adaptive D-CAP2™ mode synchronous buck controller. This device enables system engineers to cost-effectively complete regulated power bus kits for a variety of end devices with low external component counts and low standby consumption. The D-CAP2™ mode topology used for the TPS53128 master control cycle provides a very fast transient response without the need for external components.

The TPS53128 also features dedicated circuitry that allows the device to accommodate not only low equivalent series resistance (ESR) output capacitance, such as POSCAP/dispersion-upper limit, but also ceramic capacitors. Fixed frequency simulation adaptive turn-on time control supports high-efficiency seamless operation under heavy load conditions, reducing operating frequency between PWM modes in the range of milliamps at light loads.

characteristic

• D - CAP2™ mode control
  • Fast transient response
  • No external parts are required for loop compensation
  • Compatible with ceramic output capacitors
• High initial reference accuracy (± 1%)
• Low output ripple
• Wide input voltage range: 4.5 V to 24 V
• Output voltage range: 0.76 V to 5.5 V
• Low_targetR_DS(ON).Lossless current sensing
• Adaptive gate driver with integrated boost diode
• Adjustable soft-start
• Non-sinking pre-bias soft-start
• Switching frequency of 350 kHz
• Cycle-by-cycle overcurrent limiting control
• OCP threshold voltage from 30 mV to 300 mV
• Thermal compensation of OCP by 4000/million /_ILine ° C
• Automatic skipping eco mode is high efficiency at light loads
• apply
  • Point-load regulation for a wide range of low-power systems
    • Digital TV power supply