ADP7182是一款CMOS、低压差(LDO)
Linear regulator，采用-2.7 V至-28 V电源供电，最大输出电流为−200 mA。这款高输入电压LDO适用于调节-27 V至-1.22 V供电的高性能模拟和混合信号电路。该器件采用先进的专有架构，提供高电源抑制、低噪声特性，仅需一个2.2 μF小型陶瓷输出电容，便可实现出色的线路与负载瞬态响应性能。
ADP7182 is available with a fixed output voltage option and an adjustable output model that regulates the output voltage from -1.22 V to −VIN + VDO via an external feedback divider.
ADP7182 regulator has an output noise voltage of 18 μV rms and is not affected by the output voltage. The enabling logic can interface with positive and negative logic levels for maximum flexibility.
ADP7182 is available in an 8-pin LFCSP package for low-profile, small-form factor applications. The 5-pin TSOT package is scheduled for release by the end of 2013.
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适应噪声敏感应用：模数转换器
(ADC)和数模转换器(DAC)电路，精密放大器
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