Shot Transceiver Logic - Transceiver Voltage Clamping (GTL-TVC) provides high-speed voltage conversion with low on-state resistance and minimal transmission delay. GTL2010 provides 10 NMOS transistors (Sn and Dn) with common gates (GREF) and one reference transistor (SREF and DREF). The device allows bidirectional voltage conversion between 1.0 V and 5.0 V without the use of directional pins.
When the Sn or Dn ports are low, the clamp is in the ON state and there is a low-resistance connection between the Sn and Dn ports. Assuming a higher voltage on the Dn port, when the Dn port is high, the voltage on the Sn port is limited to the voltage set by the reference transistor (SREF). When the Sn port is high, the pull-up resistor pulls the Dn port up to VCC. This feature allows for seamless conversion between higher and lower voltages selected by the user without the need for directional control.
All transistors have the same electrical characteristics, with minimal deviation in voltage or transmission delay between outputs. Since transistors are manufactured symmetrically, this is beneficial for discrete transistor voltage conversion solutions. Because all transistors in the device are identical, SREFs and DREFs can be found on any other ten matching Sn/Dn transistors, allowing for more convenient board layouts. The transistors of the converters provide excellent ESD protection for low-voltage devices and low-ESD-resistant devices at the same time.
characteristic
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10-bit bidirectional low-voltage converter
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允许1.0 V、1.2 V、1.5 V、1.8 V、2.5 V、3.3 V和5 V总线（允许直接连接GTL、GTL+、LVTTL/TTL和5 V CMOS电平）之间的电压电平变换
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提供双向电压变换，无方向引脚
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输入和输出引脚(Sn/Dn)之间有低6.5 Ω导通状态阻抗(Ron)
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支持热插入
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无需电源：不会闭锁
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5 V耐受输入
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低待机电流
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直通引出线便于印刷电路板走线排布
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ESD保护：按JESD22-A114超过2000 V HBM，按JESD22-A115超过200 V MM，按JESD22-C101超过1000 V CDM
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提供封装：TSSOP24、HVQFN24
Target Applications
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需要双向或单向电压电平转换（从1.0 V至5.0 V的任意电压到1.0 V至5.0 V之间的任意电压）的任何应用
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无方向针脚的开漏结构非常适合双向低电压（例如，1.0 V、1.2 V、1.5 V或1.8 V）处理器I²C总线端口变换至普通3.3 V和/或5.0 V I²C总线信号电平或GTL/GTL+变换至LVTTL/TTL信号电平。