AD6677BCPZ 80 MHz bandwidth IF receiver
The AD6677 is an 11-bit, 250 MSPS intermediate frequency (IF) receiver designed to support multi-antenna systems in telecom applications requiring high dynamic range performance, low power consumption, and small form factor.
The device includes a high-performance analog-to-digital converter (ADC) and a noise shaping requantizer (NSR) digital module. The ADC consists of a multi-stage, differential pipeline architecture with integrated output error correction logic, and the first stage of each ADC differential pipeline contains a wide-bandwidth switching capacitor sampling network. Integrated voltage reference simplifies design. The duty cycle stabilizer (DCS) compensates for fluctuations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.
The output of the ADC is internally connected to the NSR module. Integrated NSR circuitry improves signal-to-noise ratio (SNR) performance in smaller frequency bands within Nyquist's bandwidth. The device supports two different output modes, which can be selected via SPI. If the NSR feature is enabled, the AD6677 can achieve higher SNR performance over a limited partial Nyquist bandwidth while maintaining 11-bit output resolution when processing the ADC's output.
The NSR module can be programmed to provide 22% or 33% of the bandwidth of the sampling clock. For example, when the sampling clock rate is 250 MSPS, the AD6677 can achieve an SNR of up to 76.3 dBFS in 55 MHz bandwidth in 22% mode; In 33% mode, it can achieve an SNR of up to 73.5 dBFS over 82 MHz bandwidth.
When the NSR module is disabled, ADC data is provided directly to the output at 11-bit resolution. In this operating mode, the AD6677 is capable of achieving an SNR of up to 65.9 dBFS over the entire Nyquist bandwidth. As a result, the AD6677 can be used in telecommunications applications such as digital predistortion observation paths that require wider bandwidth.
The output data is sent directly to JESD204B external serial output channel. This output is set to the current mode logic (CML) level. A mode is supported so that the output encoded data is sent over a single channel (L = 1; F = 4). The device provides synchronous input control (SYNCINB± and SYSREF±).
The AD6677 receiver is capable of digitizing a wide mid-frequency spectrum. This IF sampling architecture significantly reduces device cost and complexity compared to traditional analog techniques or less integrated digital methods.
Flexible power-down options can significantly reduce power consumption when needed. Programmable over-range level detection is supported via a dedicated fast detection pin.
Product features:
- 可配置JESD204B输出模块集成锁相环(PLL)，支持每通道最高5 Gbps的采样速率。
- 中频接收机包括11位250 MSPS ADC，ADC具有可编程的噪声整形再量化器(NSR)功能，当带宽降低至采样速率的22%或33%时，它能提高信噪比。
- 支持可选RF时钟输入以简化系统板设计。
- 取得专利的差分输入在最高至400 MHz的输入频率下仍保持出色的信噪比(SNR)性能。
- 片内1至8整数输入时钟分频器和SYNC输入支持多器件同步。
- 采用1.8 V单电源供电。
- 标准串行端口接口(SPI)支持各种产品特性和功能，例如：控制时钟DCS、掉电模式、测试模式、基准电压模式、超量程快速检测以及串行输出配置等。
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- 通信
- 分集无线电和智能天线(MIMO)系统
- 多模式数字接收机(3G)
TD-SCDMA、WiMAX、 WCDMA、
CDMA2000、GSM、 EDGE、LTE
- I/Q解调系统
- 通用软件无线电
Microchip Centennial Electronic Technology (Shenzhen) Co., Ltd
Address: 13H, Block A, Huaqiang Plaza, Huaqiang Road, Futian District, Shenzhen
Phone: 0755-83591082
Fax: 0755-83591083
Q Q：1051085817
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