The AD9959 consists of four direct digital synthesizer (DDS) cores, each with independent frequency, phase, and amplitude control. This flexibility can be used to correct imbalances between signals caused by analog processing such as filtering, amplification, or PCB layout mismatches. Because all channels share a common system clock, they are inherently synchronized, supporting the synchronization of multiple devices.
The AD9959 can perform frequency, phase, or amplitude modulation up to order 16 (FSK, PSK, ASK). Modulation is performed by applying data to the mode pin. In addition, the AD9959 supports linear frequency, amplitude, or phase sweep for applications such as radar, instrumentation, and more.
The serial I/O ports of the AD9959 support a variety of configurations, providing great flexibility. Similar to the SPI mode of operation provided in previous DDS products from Analog Devices, the serial I/O ports provide SPI-compatible operation. Four data pins (SDIO_0/SDIO_1/SDIO_2/SDIO_3) correspond to four programmable modes of serial I/O, providing flexibility.
The AD9959 uses advanced DDS technology to provide high performance at low power. The device integrates four high-speed 10-bit DACs with excellent wideband and narrowband SFDR performance. Each channel has a dedicated 32-bit frequency tuning word, 14-bit phase offset, and a 10-bit output proportional multiplier.
The DAC output is referenced to the supply voltage and must be connected to AVDD via a resistor or AVDD center-tapped transformer. Each DAC has its own programmable reference source for different full-scale currents for each channel.
This DDS can be used as a high-resolution divider when using REFCLK as input and DAC providing output. All channels share a REFCLK input source, which can be driven directly or used with a built-in REFCLK multiplier (PLL) up to 500 MSPS maximum. The programmable range of PLL multiplication factor is 4~20, and the step is integer. The REFCLK input also has oscillation circuitry that uses an external crystal as a REFCLK source. The frequency of the crystal oscillator must be between 20 MHz and 30 MHz. Crystal oscillators can be used with REFCLK multipliers.
The AD9959 is available in a space-saving 56-lead LFCSP package. The DDS core (AVDD and DVDD pins) operates from a 1.8 V supply. The digital I/O interface (SPI) operates at 3.3 V and requires connecting the DVDD_I/O (pin 49) to 3.3 V.
The AD9959 operates over the industrial temperature range of -40°C~+85°C.
apply
Agile local oscillator (LO) frequency synthesis
Phased array radar/sonar
Instrumentation
Synchronize the clock
RF source for AOTF (Acousto-optic Tunable Filter).