ISL34321

• 16-bit RGB transport over single differential pair
• 6MHz to 45MHz pixel clock rates are pixel clock frequencies from 6MHz to 45MHz
• Bi-directional auxiliary data transport without extra bandwidth and over the same differential pair
• Hot plugging with automatic resynchronization every HSYNC.
• I 2 C Bus Mastering to the remote side of the link with a controller on either the serializer or deserializer I 2 C Bus Controller masters the remote side and the link, whether it is a serializer or deserializer
• Selectable clock edge for parallel data output
• DC balanced with industry standard 8b/10b line code allows AC-coupling
  • Provides immunity against ground shifts
• 16 programmable settings each for transmitter amplitude boost and pre-emphasis and receiver equalization allow for longer cable lengths and higher data rates 16 programmable settings for transmitter amplitude increase and pre-emphasis and receive equalization, each allowing for longer cable lengths and higher data rates
• Same device for serializer and deserializer simplifies inventory for the same device

The ISL34321 is a serializer/deserializer of LVCMOS parallel video data ISL34321. The video data presented to the serializer on the parallel LVCMOS bus is serialized into a high-speed differential signal. This differential signal is converted back to parallel video at the remote end by the deserializer. It also transports auxiliary data bidirectionally over the same link during the video vertical retrace interval.

I 2 C bus mastering allows the placement of external slave devices on the remote side of the link. The I2C bus master allows the remote connection to be placed as a slave to external devices. An I 2 C controller can be placed on either side of the link allowing bidirectional I 2 C communication through the link to the external devices on the other side , which allows for two-way communication I 2C. Both chips can be fully configured from a single controller or independently by local controllers.