Brief introduction
These modules offer unprecedented integration, combining the functions of multiple discrete ICs in a single package, enabling the development of compact, cost-effective contactless reader systems for access and industrial applications. The module includes microcontroller functionality and supports a variety of contactless reader protocols based on 13.56 MHz.
The package contains two chips:
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LPC1227FBD48/301
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CLRC66301HN1
Not all pins for the LPC1227 specified in the datasheet are provided in the reader module.
The individual devices do not implement any interconnects within the package. This enables access to all signals during system development.
overview
CLRC663
CLRC663 is a highly integrated transceiver IC that enables contactless communication at 13.56 MHz. Utilizing extraordinary modulation and demodulation concepts, this transceiver IC fully integrates all types of contactless communication methods and protocols at 13.56 MHz.
CLRC663 transceiver ICs support the following different operating modes:
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支持ISO/IEC 14443A/MIFARE的读/写模式
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支持ISO/IEC 14443B的读/写模式
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支持FeliCa方案的读/写模式
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支持ISO/IEC 15693的读/写模式
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支持ICODE EPC UID/ EPC OTP的读/写模式
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支持ISO/IEC 18000-3 Mode 3的读/写模式
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NFC P2P启动器
CLRC663 internal transmitter can drive read/write antennas designed to communicate with ISO/IEC 14443A/MIFARE cards and transmit transponders without the need for additional active circuitry. The receiver module provides a powerful and efficient implementation of demodulation and decoding signals from ISO 14443A/MIFARE compliant cards and transponders. The digital module manages all ISO 14443A framing and error detection (parity and CRC) functions. CLRC663 supports MIFARE 1K, MIFARE 4K, MIFARE Ultralight, MIFARE, Ultralight C, MIFARE PLUS, and MIFARE DESFire products. CLRC663 supports contactless communication, using a high MIFARE transfer rate of up to 848 kBd in both directions.
All layers of the ISO/IEC 14443B read/write communication scheme CLRC663 supported with the correct implementation of additional components such as oscillators, power supplies, coils, and standardized protocols such as ISO/IEC 14443-4 and/or ISO/IEC 14443B collision prevention. Use of this NXP IC in accordance with ISO/IEC 14443B may infringe third-party patent rights. The purchase of this NXP IC requires attention to the corresponding third-party patent license.
When enabled in FeliCa read/write mode, the CLRC663 transceiver IC supports the FeliCa communication scheme. The receiver component provides a powerful and efficient demodulation and decoding circuit for FeliCa-encoded signals. The digital part handles error detection such as FeliCa framing and CRC. CLRC663 supports FeliCa's higher-speed contactless communication with bidirectional transmission rates of up to 424 kbit/s. CLRC663 supports proximity protocols that comply with ISO/IEC15693, EPC UID, and ISO/IEC 18000-3 Mode 3 standards. NXP's full range of proximity products are also supported for readability for mid-range reader applications.
The following host interfaces are available:
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串行外设接口(SPI)
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串行UART（类似RS232，电压电平取决于针脚电压供应）
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I²C总线接口（已实施两个版本：I2C和I2CL）
LPC1227
LPC1227 is an ARM Cortex-M0-based microprocessor for embedded applications with high integration and low power consumption. ARM Cortex-M0 is a new generation of microcontroller cores with multiple system enhancements such as easy debugging and integration. In addition to the ARM Cortex-M0, the LPC1X also features an event handler API that limits the interrupt load on the ARM Cortex-M0 CPU and enables additional power savings by offloading the main CPU processing load.
LPC1227 CPU frequency up to 33 MHz and contains up to 128 kB of flash memory and 8 kB of data memory.
Not all connections for LPC1227 products are implemented by the PR601.