AD9861-80
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AD9861-80

  • Category:broadband
  • Product Name:10-bit mixed-signal front-end (MxFE)® processor
  • Manufacturers:AD
  • Production Batch Number:10+
  • Encapsulation:CSP
  • Stock Status:There is stock
  • Stock Quantity:1000
  • Minimum order quantity: 1
  • Details:
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  • Product introduction

The AD9861 is a member of the MxFE ® family, a group of integrated converters for the communications market.The AD9861 includes dual 10-bit analog-to-digital converters (ADCs) and dual 10-bit digital-to-analog converters (TxDAC ® converters).In the case of two speed classes, one -50 -80.-50 ADCs are optimized for 50 MSPS and reduced sampling ADCs, while -80 ADCs are sampled at 50 MSPS and optimized for 80 MSPS.The TxDAC converter operates at dual speeds up to 200 MHz and includes a bypassable 2x or 4x interpolation filter.Three auxiliary converters can also provide the required system-level control voltage or monitoring system signals.All devices are optimized for low power consumption, small size, and provide an effective solution for the broadband communications market at expense.

The AD9861 uses a single input clock pin (CLKIN's) to generate all system clocks.The ADC and TxDAC convert the clock time to generate a generation block, utilizing user-programmable options such as chasm circuits, PLL multipliers, and switches.

A flexible bidirectional 20-bit I/O bus is a variety used to accommodate custom digital back-ends or open market DSPs.In half-duplex systems, the interface supports 20-bit parallel transmission or 10-bit interleaved transmission.In a full-duplex system, the interface supports interleaved 10-bit ADC buses as well as interleaved 10-bit transmit buses.The flexible I/O bus reduces the pin count, so package size is required.

The AD9861 can use the mode pin or serial programmable interface (SPI) to configure the interface bus, operate the ADC in low power mode, configure the interpolation rate of the TxDAC family converters, and control the power off of the ADC and power down the TxDAC family.Allows more SPI programmable options for both the TxDAC path (e.g., coarse gain control, channel-matched offset control) and the ADC path (e.g., internal duty cycle stable, 2 complement data format).

The AD9861 is packaged in a 64-lead LFCSP (low profile, fine pitch chip scale package).The 64-pin LFCSP package area is only 9 mm, 9 mm and less than 0.9 mm to applications such as PCMCIA snap pitch for higher fitting.

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Broadband access
Broadband LAN
Communication (modem)

andAD9861-80Related ICs are:


Model Manufacturers lot number encapsulation illustrate
AD9861BCPZRL-80 Analog Devices 15+ 64 ld LFCSP 10-bit mixed-signal front-end (MxFE)® processor
AD9861BCPZRL-50 Analog Devices 15+ 64 ld LFCSP 10-bit mixed-signal front-end (MxFE)® processor
AD9861BCPZ-80 Analog Devices 15+ 64 ld LFCSP 10-bit mixed-signal front-end (MxFE)® processor
AD9861BCPZ-50 Analog Devices 15+ 64 ld LFCSP 10-bit mixed-signal front-end (MxFE)® processor
AD9861-80 AD 10+ CSP 10-bit mixed-signal front-end (MxFE)® processor

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