AD9517-3
1Provides multiple-output clock distribution with subpicosecond jitter performance and on-chip phase-locked loop (PLL) and voltage-controlled oscillator (VCO). The on-chip VCO is tuned over a frequency range of 1.75 GHz to 2.25 GHz. External VCCO/VCXOs up to 2.4 GHz can also be used.
AD9517-3 has excellent low jitter and phase noise characteristics for a significant boost
Data convertersand also benefit other applications with demanding phase noise and jitter.
The AD9517-3 has four LVPECL outputs in two pairs and four LVDS outputs in two pairs. Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL output operates at 1.6 GHz, the LVDS output at 800 MHz, and the CMOS output at 250 MHz.
Each pair of outputs has a divider with programmable divider ratio and coarse delay (or phase). The LVPECL output is divided over a frequency division range of 1 to 32. The LVDS/CMOS output has a crossover range of up to 1024.
The AD9517-3 is available in a 48-lead LFCSP package and can operate from a single 3.3 V supply. With an external VCO, a wider voltage range is required, which can be achieved by connecting the charge pump supply (VCP) to a 5.5 V voltage. The stand-alone LVPECL supply can be from 2.5 V to 3.3 V nominal.
The AD9517-3 is specified over the standard industrial temperature range of −40°C to +85°C.
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