AD9517-4ABCPZ-RL7
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AD9517-4ABCPZ-RL7

  • Category:Timer timer
  • Product Name:12 output clock generators with integrated 1.6 GHz VCO
  • Manufacturers:AD
  • Production Batch Number:14+
  • Encapsulation:48 ld LFCSP
  • Stock Status:There is stock
  • Stock Quantity:2330
  • Minimum order quantity: 1
  • Details:Click here to find pdf documentation for the AD9517-4ABCPZ-RL7
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  • Product introduction

Advantages and features

  • Low phase noise, phase-locked loop
    The on-chip VCO is tuned over a frequency range of 1.45 GHz to 1.80 GHz
    Optional external VCO/VCXO up to 2.4 GHz
    1 differential or 2 single-ended reference inputs
    Refer to Monitoring Features
    Auto/manual reference switch/hold mode
    Automatic recovery from hold
    Supports LVPECL, LVDS, or CMOS benchmarks up to 250 MHz
    Programmable PFD path delay
    Optional digital or analog clock detection
  • Two pairs of 1.6 GHz LVPECL outputs
    Each pair of outputs shares a divide-by-1 to 32 and coarse phase delay
    Additive output jitter: 225 fSRoot mean square value
    The pairwise output of channel-to-channel skew is less than 10 ps
  • Two pairs of 800 MHz LVDS clock outputs
    Each pair of outputs shares two cascaded dividers from 1 to 32 and coarse phase delays
    Additive output jitter: 275SRoot mean square value
    The delay (Δt) of each LVDS output can be fine-tuned


  • Eight 250 MHz CMOS outputs (two LVDS outputs each)
  • All outputs are automatically synchronized at power-up
  • For more features, please refer to the data sheet
  • Product details

    AD9517-41Provides multiple-output clock distribution with sub-picosecond jitter performance and integrated phase-locked loop (PLL) and voltage control on-chiposcillator(VCO)。 The on-chip VCO is tuned over a frequency range of 1.45 GHz to 1.80 GHz. External VCCO/VCXOs up to 2.4 GHz can also be used.

    The AD9517-4's excellent low jitter and phase noise greatly improves data converter performance and also benefits other applications where phase noise and jitter are critical.

    The AD9517-4 has four LVPECL outputs in two pairs and four LVDS outputs in two pairs. Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL output operates at 1.6 GHz, the LVDS output at 800 MHz, and the CMOS output at 250 MHz.

    Each pair of outputs has a divider with programmable divider ratio and coarse delay (or phase). The LVPECL output is divided over a frequency division range of 1 to 32. The LVDS/CMOS output has a crossover range of up to 1024.

    The AD9517-4 is available in a 48-lead LFCSP package and can operate from a single 3.3 V supply. An external VCO can be used when connecting a charge pump supply (VCP) to a 5V voltage, which requires a wider voltage range. The stand-alone LVPECL supply can be from 2.5 V to 3.3 V nominal.

    The AD9517-4 is specified over the industrial temperature range of −40°C to +85°C.

    apply

  • Low jitter, low phase noise clock distribution
  • 10/40/100 Gb/s network line cards, including SONET, Synchronous Ethernet, OTU2/3/4
  • Forward Error Correction (G.710)
  • Provides clocks for high-speed ADC, DAC, DDS, DDC, DUC, MxFE
  • High-performance wireless transceivers
  • Automated Test Equipment (ATE) and high-performance instrumentation


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