The AD9691 is a dual-channel, 14-bit, 1.25 GSPS analog-to-digital converter (ADC). The device has built-in on-chip buffers and sample hold circuitry designed for low power consumption, small size, and ease of use. The device is designed for wideband analog signal sampling up to 1.5 GHz.
This dual-channel ADC core adopts a multi-level, differential pipeline architecture and integrates output error correction logic. Each ADC has a wide bandwidth input that supports a variety of user-selectable input ranges. Integrated voltage reference simplifies design.
Each ADC data output is internally connected to two digital downconverters (DDCs). Each DDC contains 4 cascading signal processing stages: a 12-bit frequency converter (NCO) and four half-band extraction filters.
In addition to the DDC module, the AD9691 has additional features that simplify automatic gain control (AGC) for communication receivers. Using the ADC's fast detection output bit, the programmable threshold detector monitors the input signal power. If the input signal level exceeds the programmable threshold, the quick detection indicator becomes high. Because the threshold indicator has a very low latency, users can quickly adjust down the system gain to avoid over-range at the ADC input.
The high-speed serial outputs of JESD204B subclass 1 can be set to a variety of single, dual, quad, or eight-channel configurations, depending on the DDC configuration of the receiving logic device and the acceptable channel rate. Multi-device synchronization support is provided through SYSREF± input pins.
The AD9691 is available in an 88-pin lead-free LFCSP package and is rated for an industrial temperature range of −40°C to +85°C.
Product features:
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低功耗模拟内核，14位、1.25 GSPS双通道analog-to-digital converter(ADC)，每通道1.9 W。
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较宽的全功率带宽，支持高达1.5 GHz的IF信号采样。
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提供可编程输入端的缓冲输入简化了滤波器设计和实施。
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灵活的串行端口接口(SPI)控制各种产品特性和功能，满足特定系统要求。
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可编程快速超量程检测。/li>
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12 mm × 12 mm、88引脚LFCSP。
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通信（宽带接收器和数字预失真）
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仪器仪表（频谱分析仪、网络分析仪、集成式RF测试解决方案）
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DOCSIS 3.x CMTS上游接收路径
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高速数据采集系统