How to improve ADC resolution and reduce noise

All analog-to-digital converters (ADCs) have a certain amount of "input-to-input noise" that can be simulated as a noise source in series with a noise-free ADC input. Input-to-input noise is different from quantized noise, which only occurs when the ADC processes AC signals. In most cases, the lower the input noise, the better, but in some cases, the input noise actually helps to achieve higher resolutions.

 

What is Input Noise?

Actual ADCs deviate from the ideal ADC in many ways. The noise that is folded to the input is certainly not ideally occurring, and its effect on the overall transfer function of the ADC is shown in Figure 1. As the analog input voltage increases, the "ideal" ADC (as shown in Figure 1A) maintains a constant output code until it reaches the transition zone, at which point the output code immediately jumps to the next value and remains there until the next transition zone is reached.

 

Theoretically, the ideal ADC has a "code transition" noise of 0 and a jump zone width equal to 0. The actual ADC has a certain amount of code transition noise, so the transition zone width depends on the amount of noise converted to the input (as shown in Figure 1B). Figure 1B shows that the width of the code transition noise is approximately 1 LSB (least significant bit) peak-to-peak.

Figure 1: Input noise folded and its effect on the ADC transfer function

 

Due to resistive noise and "kT/C" noise, all ADC internal circuitry generates some amount of root mean square (RMS) noise. Even if it is a DC input signal, this noise also exists, and it is the reason for the existence of code transition noise. Nowadays, code transition noise is usually referred to as "input side noise", rather than directly using the term "code transition noise".

 

Input Noise is usually characterized by a histogram of several output samples when the ADC input is a DC value. The output of most high-speed or high-resolution ADCs is a series of codes centered on the nominal value of the DC input (see Figure 2). To measure its value, the ADC's input is grounded or connected to a deeply decoupled voltage source, then a large number of output samples are taken and represented as a histogram (sometimes referred to as a "ground input" histogram). Since the noise is roughly Gaussian distributed, the standard deviation σ of the histogram can be calculated, which corresponds to the effective input root mean square noise.

Figure 2: Effect of Input Noise Folded to ADC "Ground Input" Histogram (ADC Has a Small DNL)

 

While the ADC's inherent differential nonlinearity (DNL) can cause its noise distribution to deviate slightly from the ideal Gaussian distribution (partial DNL is shown in the Figure 2 example), it is at least roughly Gaussian. If the DNL is relatively large, the σ values of multiple different DC input voltages should be calculated and then averaged. For example, if the code distribution has large and unique peaks and valleys, it indicates poor ADC design or, more likely, incorrect PCB layout routing, poor grounding, and improper power decoupling (see Figure 3). When the DC input sweeps the ADC input voltage range, if the distribution width changes dramatically, this is also a problem.

Figure 3: Histogram of a poorly designed ADC and/or improperly laid out ground input with routed, grounded, and decoupled

 

 

Improve ADC resolution and reduce noise?

The effect of input noise can be reduced by the digital mean method. Suppose a 16-bit ADC has 15-bit noise-free resolution with a sample rate of 100 kSPS. For each output sample, if the two samples are averaged, the effective sample rate is reduced to 50 kSPS, the SNR is increased by 3 dB, and the number of noiseless bits is increased to 15.5 bits.

 

If the four samples are averaged, the sample rate is reduced to 25 kSPS, the SNR is increased by 6 dB, and the number of noiseless bits is increased to 16 bits. In fact, if the 16 samples are averaged, the output sampling rate drops to 6.25 kSPS, the SNR increases by another 6 dB, and the number of noiseless bits increases to 17 bits. In order to take advantage of the additional "resolution", the mean algorithm must be performed on a large significant number of bits.

 

The mean process also helps to eliminate the DNL error of the ADC transfer function, which can be illustrated by the following simple example: Suppose the ADC has a code loss at the quantization level "k", although the code "k" is lost due to the large DNL error, the average of the two adjacent codes k – 1 and k + 1 is equal to k. As a result, this technology can be used to effectively improve the dynamic range of the ADC at the cost of lower overall output sampling rates and the need for additional digital hardware.

 

However, it should be noted that the mean does not correct for the integral nonlinearity inherent in ADCs. Now consider a situation where the ADC has very low input noise and the histogram always shows a clear code, what is the role of the digital mean for this ADC? The answer is simple – it doesn't work! No matter how many samples are averaged, the answer is always the same. However, as long as the noise is added to the input signal enough to have more than one code in the histogram, then the mean method will be useful. Therefore, a small amount of noise may be a good thing (at least for the mean method), but the higher the noise present at the input, the more mean samples are needed to achieve the same resolution.