Parallel input/output of the chip machine

MC9S08AW60 have input/output ports, namely PORTA, PORTB, PORTC, PORTD, POTTE, PORTF, and PORTG. Most I/O pins and functional pins of on-chip and peripherals such as timers, string aerospace communications, and keyboard interrupts are multiplexed.

The characteristics of parallel I/O are as follows:

● 7 ports, with up to 54 universal I/O pins. Input or output can be configured via software;

● When used as input pins, it has a hysteresis input buffer; each input pin can be software-configured with internal input pull-up resistance;

● When used as an output pin, the slew rate output buffer can be configured via software;

● Port A has 8 I/O pins;

● Port B has 8 pins and is multiplexed with ADC1;

● Segment C has 7 pins and is multiplexed with SCI2, IIC1, and MCLK;

● Port D has 8 pins and multiplexes external clock inputs for ADC1, KBI1, as well as TPM1 and TPM2;

● Port E has 8 pins and is multiplexed with SCI1, TPM1, and SPI1;

● Port F has 8 pins and is multiplexed with TPI1 and TPM2;

● Port G has 7 pins and is multiplexed with XTAL, EXTAL, and KBI1;

If the I/O port pins are not controlled by other modules, they will all serve as the universal I/O pins. The number of I/O pins on a chip depends on the different packages: a chip with 64 pins has 54 I/O pins, while a chip with 48 pins has 38. Each port has an 8-bit data orientation register bit PTxDD and an 8-bit data register PTxD. They are located in zero-page memory space and can be accessed conveniently and efficiently through methods such as direct addressing. Parallel I/O read/write via port data register TPxD. The port input direction is controlled by the data direction register TPxDD.

The data direction control bit TPxDDn determines whether the pin acts as input or output, and also determines the specific meaning when reading/writing the data register PTxD. When TPxDDn = 0, the corresponding pin is used as input. Read data register TPxDn returns pin status. Write data register TPxDDn does not affect pin status and only updates the value in TPxDx. Write register TPxD reflects the corresponding value as pin level output: 0 outputs low, 1 outputs low. When peripheral modules or system functions control pins, even if the peripheral module replaces actual pin direction control, the data direction bit still controls the return value when reading the port data register TPxD.

When analog functionality on a multiplex pin is allowed, all digital pin functions are disabled. At this time, the read port data register returns 0. Usually, when a pin shares digital and analog functions, analog functions have higher priority than digital functions. Therefore, if both are allowed, it is actually the analog function control pin.

Develop good programming habits; Before changing the output direction of the port pins, initialize the port data accumulator to ensure that pin levels are not driven by old data in the port data register. The value in the port data register only affects the pin state after the port pin direction changes to output.