Parallel input/output of the chip player

MC9S08AW60Has inputs/Output port, iePORTA、PORTB、PORTC、PORTD、POTTE、PORTFandPORTGmajorityI/OPins and on-chip peripheral modules such as timers, serial space communications, keyboard interrupts, etc. function pin multiplexing.

ParallelI/OThe features are as follows:

● 7 ports with up to 54 general-purpose I/O pins. Hungry day input or output can be configured through software;

●When used as an input pin, it has a hysteretic input buffer, and each input pin can be software configured with an internal input pull-up resistor;

●When used as an output pin, the slew rate output buffer can be configured by software;

● Port A has 8 I/O pins;

● Port B has 8 pins and ADC1 multiplexed;

●Segment C has 7 pins and is multiplexed with SCI2, IIC1 and MCLK;

● Port D has 8 pins and is multiplexed with the external clock input of ADC1, KBI1, TPM1 and TPM2;

● Port E has 8 pins and is multiplexed with SCI1, TPM1 and SPI1;

● Port F has 8 pins and is multiplexed with TPI1 and TPM2;

● Port G has 7 pins and is multiplexed with XTAL, EXTAL and KBI1;

If the I/O port pins are not controlled by other modules, they are all used as general-purpose I/O pins. The number of chip I/O pins depends on the package, with a chip in a 64-pin package having 54 I/O pins and a chip in a 48-pin package having 38 data direction register bits PTxDD and an 8-bit data register PTxD per port. They are located in 0-page memory space and can be easily and efficiently accessed by, for example, direct addressing. Read/write parallel I/O through port data register TPxD. The port input direction is controlled by the data direction register TPxDD.

The data direction control bits TPxDDn determine whether the pin is used as an input or output, and they also determine what it means when reading/writing data register PTxD. When TPxDDn=0, the corresponding pin as input, read data register TPxDn returns the pin status, write data register TPxDDn does not affect the pin state, only update the value in TPxDx, write data register TPxD reflects the corresponding value as pin level output: 0 output low, 1 output low level. When a peripheral module or system function controls a pin, the data direction bit still controls the return value when reading the port data register TPxD, although the peripheral module replaces the actual pin direction control.

When analog functions on one multiplexed pin are allowed, all digital pin functions are disabled. The read port data register returns 0. In general, when one pin shares digital and analog functions, analog functions have a higher priority than digital functions, so if both digital and analog functions allow, then it is actually the analog function control pin.

Develop good programming habits; Initialize the port data accumulation before changing the directional output of a port pin to ensure that the pin level is not driven by old data in the port data register. The value in the port data register affects the pin state only after the port pin direction changes to output.