Shot transceiver logic- Transceiver voltage clamping (GTL-TVC) provides high-speed voltage conversion with low on-state resistance and minimal propagation delay. The GTL2010 offers 10 NMOS transport transistors (Sn and Dn) with a common gate (GREF) and a reference transistor (SREF and DREF). The device allows bidirectional voltage conversion between 1.0 V and 5.0 V without the use of direction pins.
When the Sn or Dn ports are low, the clamp is on and there is a low-resistance connection between the Sn and Dn ports. Assuming a higher voltage on the Dn port, when the Dn port is high, the voltage on the Sn port is limited to the voltage set by the reference transistor (SREF). When the Sn port is high, the pull-up resistor pulls the Dn port up to VCC。 This feature allows seamless conversion between higher and lower voltages selected by the user without the need for direction control.
All transistors have the same electrical characteristics with minimal deviation in voltage or propagation delay between outputs. Since transistors are manufactured symmetrically, this facilitates discrete transistor voltage conversion solutions. Because all transistors in the device are identical, SREF and DREF can be found on any other ten matched Sn/Dn transistors, allowing for a more convenient board layout. The transistors of the converter provide excellent ESD protection for low voltage devices while protecting low ESD resistant devices.
characteristic
- 10-bit bidirectional low-voltage converter
- Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V buses that allow direct connection to GTL, GTL+, LVTTL/TTL, and 5 V CMOS levels
- Bidirectional voltage conversion is provided with no directional pins
- There is a low 6.5 Ω on-state impedance (R) between the input and output pins (Sn/Dn).on)
- Supports hot insertion
- No power required: no latching
- 5 V tolerant input
- Low standby current
- Straight-through pinouts facilitate printed circuit board routing
- ESD protection: over 2000 V HBM according to JESD22-A114, 200 V MM according to JESD22-A115, and 1000 V CDM according to JESD22-C101
- Available in packages: TSSOP24, HVQFN24
Target Applications
- Any application that requires bidirectional or unidirectional voltage level translation from any voltage from 1.0 V to 5.0 V to any voltage between 1.0 V and 5.0 V
- The directionless pin-free open-drain architecture is ideal for converting bidirectional low voltages (for example, 1.0 V, 1.2 V, 1.5 V, or 1.8 V) processor I²C-bus ports to normal 3.3 V and/or 5.0 V I²C-bus signal levels or GTL/GTL+ to LVTTL/TTL signal levels.