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AD9671KBCZ
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AD9671KBCZ

  • Category:ADC analog-to-digital converter
  • Product Name:8-channel ultrasonic AFE with integrated digital demodulator and JESD204B interface
  • Manufacturers:AD
  • Production Batch Number:14+
  • Encapsulation:BGA144
  • Stock Status:There is stock
  • Stock Quantity:230
  • Minimum order quantity: 1
  • Details:Click to find the PDF of the AD9671KBCZ
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  • Product introduction

Advantages and features

  • 8-channel LNA, VGA, AAF, ADC, and digital demodulator/decimator
    -- Low power consumption: 130 mW per channel in TGC mode, 40 MSPS; In CW mode, 65 mW per channel; Less than 30 mW at power-up
    -- 10 mm × 10 mm, 144-pin CSP-BGA package
  • Low noise preamplifier (LNA) 
    -- Input referred noise: 0.78 nV/√Hz, gain = 21.6 dB
    -- Programmable gain: 15.6 dB/17.9 dB/21.6 dB -- 0.1 dB compression: 1000 mV p-p/750 mV p-p/450 mV p-p -- Flexible active input impedance matching
  • Variable Gain Amplifier (VGA) 
    -- Attenuator range: 45dB, linear-in-dB gain control
    -- Post amplifier gain (PGA): 21 dB/24 dB/27 dB/30 dB
  • Anti-aliasing filter (AAF) 
    -- Programmable second-order LPF range: 8 MHz to 18 MHz or 13.5 MHz to 30MHz and HPF
  • Analog-to-digital converters (ADCs) 
    -- SNR: 75dB (14 bits, up to 125 MSPS)
  • JESD204B Subclass 0 encodes serial digital outputs
  • CW mode harmonic suppression I/Q demodulator 
    -- Independently programmable phase rotation
    -- Output dynamic range per channel: >160 dBc/√Hz 
    -- Signal-to-noise ratio (SNR) referred to the output: 156 dBc/√Hz, 1 kHz offset, −3 dBFS
  • Digital demodulator/decimator 
    -- I/Q demodulator with programmable oscillator 
    -- FIR decimation filter: 
    Each decimation factor has 16 taps
  • Product details

    AD9671Supports medical ultrasound applications designed for low cost, low power, small size, and ease of use. It contains 8 channels of variable gain amplifier (VGA), low noise preamplifier (LNA), CW harmonic suppression I/Q demodulator with programmable phase rotation, antialiasing filter (AAF),Analog-to-digital converters(ADC) and digital demodulators and decimators for processing data and reducing bandwidth.

    Each channel has a maximum gain of 52 dB, a fully differential signal path, and an active input preamplifier termination. Channels are optimized for high dynamic range and low power consumption for applications requiring a small package size.

    The LNA has single-ended-to-differential gain and can be selected via SPI. Assuming a noise bandwidth (NBW) of 15 MHz and an LNA gain of 21.6 dB, the LNA input signal-to-noise ratio (SNR) is 94 dB. In CW Doppler mode, each LNA output drives an I/Q demodulator. Each demodulator has independently programmable phase rotation and 16 phase settings.

    Each channel can be individually entered into power-down mode, extending battery life in portable applications. Standby mode allows quick power-up for power-on. When operating in CW Doppler mode, the VGA, AAF, and ADC all enter power-down mode. Built-in features such as programmable clocks, data alignment, and programmable digital test code generation allow for optimal device flexibility and minimal system cost. Digital test codes include built-in fixed and pseudo-random codes, as well as user-defined test codes entered via serial port (SPI).

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