AD9671KBCZ

Each channel has a maximum gain of 52 dB, a fully differential signal path, and active input preamp terminations. The channels are specifically designed for high dynamic range and low power consumption, making them suitable for applications that require small package sizes.

The LNA has a single-ended turn-to-differential gain and can be selected via SPI. Assuming a noise bandwidth (NBW) of 15 MHz and an LNA gain of 21.6 dB, the LNA input signal-to-noise ratio (SNR) is 94 dB. In CW Doppler mode, each LNA output drives an I/Q demodulator. Each demodulator features independently programmable phase rotation and 16 phase settings.

Each channel can be individually entered into power-saving mode to extend battery life for portable applications. Use standby mode to quickly power on for power on and restart. When operating in CW Doppler mode, VGA, AAF, and ADC all enter power-saving mode. ADCs have built-in features such as programmable clocks, data alignment, and programmable digital test code generation to maximize device flexibility and minimize system costs. Digital test codes include built-in fixed and pseudo-random codes, as well as user-defined test codes entered via serial port (SPI).