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DS25CP114TSQX
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DS25CP114TSQX

  • 所属类别:收发器transceiver
  • 产品名称:3.125Gbps的4X4 LVDS交叉开关与传输预加重和接收
  • 厂商:NSC
  • 生产批号:10+
  • 封装:QFN
  • 库存状态:有库存
  • 库存量:2000
  • 最低订购量:1
  • 详细资料:点击查找DS25CP114TSQX的pdf资料
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  • Product Introduction

peculiarity

  • DC - 3.125 Gbps low jitter, low offset, low power operation
  • Pin and SMBus configurations, fully differential, non-blocking architecture
  • Pin (two levels) and SMBus (four levels) optional pre-emphasis and equalization eliminate ISI jitter
  • The wide input common-mode range enables simple interfaces to CML and LVPECL drivers
  • ^Los Angeles circuit detection input open circuit fault status
  • On-chip 100Ω input and output terminations minimize insertion and return losses, reduce component count, and reduce board space. DS25CP114 eliminates on-chip input terminations and increases design flexibility.
  • Adjacent assembly on 8 kV ESD-protected LVDS I/O pins
  • Small 6mm × 6mm LLP-40 space-saving bag

illustrate

DS25CP104A and DS25CP114 3.125 Gbps 4x4 LVDS crossover switches for high-speed signal routing and switching optimized lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure excellent signal integrity and noise immunity. The non-blocking architecture allows any input to any output or connection of the output. Switch configuration can be done via external pins or System Management Bus (SMBus) interfaces.

DS25CP104A DS25CP114 function four levels (off, low, medium, high) transmit pre-emphasis (PE) receive equalization (EQ) set four levels (off, low, medium, high) via SMBus interface. Close and medium sports levels and close and low EQ levels with external pin settings. In addition, the SMBus circuitry, which enables signal loss (^, LOS) displays, can notify the system of the presence of an open input condition (such as cable disconnection).

The wide input common-mode range allows the switch to accept LVDS, CML, and LVPECL level signals at the output level of LVDS. A very small package size requires minimal space in the board, and flow-through pins allow board design work to be easier. Each DS25CP104A differential input and output is internally terminated with a 100Ω resistor to reduce return loss, reduce component count, and further reduce board space. In order to increase design flexibility, the DS25CP114 100Ω input terminals have been phased out. This enables designers to build custom configuration and distribution circuits for intersections that require a limited multipoint signal topology.


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  • SD/HD/3G HD SDI router
  • OC -​​ 48 / STM - 16
  • InfiniBand and FireWire

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