AD9234BCPZRL7-1000

AD9234is a dual, 12-bit, 1 GSPS/500 MSPS ADC. The device includes an on-chip buffer and sample-and-hold circuitry designed for low power, small size, and ease of use. This product is used to sample wide bandwidth analog signals. The AD9234 is optimized for wide input bandwidth, high sample rate, excellent linearity, and low power consumption in a small package.

This dual ADC core uses a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC has wide-bandwidth buffered inputs that support a variety of user-selectable input ranges. An integrated reference simplifies design. The data outputs of each ADC are internally connected to an optional divide-by-2 clock. The AD9234 includes several features that simplify the automatic gain control (AGC) function in communication receivers.

Using the ADC's fast sense output bits, a programmable threshold detector monitors the input signal power. If the input signal level exceeds a programmable threshold, the quick detect indicator goes high. The very low latency of this threshold indicator allows the user to quickly lower the system gain to avoid overrange at the ADC input. In addition to the fast sense output, the AD9234 also has signal monitoring capability. The signal monitoring module provides additional information about the signal that the ADC digitizes the signal.

The user can use the high-speed serial output of JESD204B Subclass 1 in single, dual, or quad configurations, depending on the acceptable channel rate of the receiving logic device and the sampling rate of the ADC. Multi-device synchronization support is provided through SYSREF ± and SYNCINB ± input pins.

The AD9234 has flexible power-down options that significantly reduce power consumption when needed. These features are programmable via a 1.8 V to 3.3 V 3-wire SPI.

The AD9234 is available in a 64-lead lead-free LFCSP package and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.

Product features

1. Low-power analog core, 12-bit, 1.0 GSPS dual channelAnalog-to-digital converters(ADC) at 1.5 W per channel.
2. Wide full power bandwidth supports sampling of IF signals up to 2 GHz.
3. Buffered inputs with programmable inputs simplify filter design and implementation.
4. A flexible serial port interface (SPI) controls a variety of product features and functions to meet specific system requirements.
5. Programmable fast overrange detection.
6. 9 mm × 9 mm, 64-pin LFCSP.
7. The AD9680 14-bit, 1 GSPS dual ADC is pin compatible.