AD9628BCPZRL7-105 12-bit, 125/105 MSPS, 1.8 V dual analog-to-digital converter
The AD9628 is a monolithic, dual, 12-bit, 125/105 MSPSAnalog-to-digital converters(ADC) from a 1.8V supply with high performance track-and-hold circuitry and on-chip reference.
It features a multistage differential pipelined architecture with built-in output error correction logic that provides 12-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the entire operating temperature range.
The ADC includes features that provide optimal flexibility and minimal system cost, such as programmable clock and data alignment, and generation of programmable digital test patterns. Available digital test codes include built-in fixed and pseudo-random codes, as well as user-defined test codes input via the serial port interface (SPI).
A differential clock input is used to control all internal conversion cycles. An optional duty cycle stabilizer (DCS) is used to compensate for large clock duty cycle fluctuations while maintaining excellent overall ADC performance.
The digital output data is formatted as offset binary, gray code, or twos complement. Each ADC channel has a data output clock (DCO) to ensure that the receive logic has the correct latch timing. Supports 1.8 V CMOS or LVDS output logic levels. Output data can also be multiplexed into a single output bus.
The AD9628 is available in a 64-lead LFCSP package, RoHS compliant, and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.
apply
- correspondence
- Diversity radio system
- Multi-mode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
- I/Q demodulation system
- Smart antenna system
- Broadband data applications
- Battery-powered meter
- Handheld oscilloscope
- Portable medical imaging
- ultrasonic
- Radar/LIDAR
Product Focus
- The AD9628 operates from a single 1.8 V analog supply, and the digital output driver operates from a separate supply, supporting either a 1.8 V CMOS or LVDS logic family.
- The patented sample-and-hold circuit maintains excellent performance at input frequencies up to 200 MHz at low cost, low power consumption, and ease of use.
- The standard serial port interface (SPI) supports various product features and functions such as data output formatting, internal clock divider, shutdown mode, DCO/data timing, and offset adjustment.