- Up to 6.384 Gbps throughput
- Input clock support from 66MHz to 133MHz
- Reduce the size and cost of cables and connectors
- Cable guidance function
- DC balancing to reduce ISI distortion
- For point-to-point baseplates or cable applications
- Low power consumption, typical at 133MHz 890 mW
- A simple PCB design process with lead-out lines
- +3.3 V supply voltage
- 100-pin TQFP package
- Compliant with TIA/EIA-644-A-2001 LVDS standard
illustrate
DS90CR486 receives 8 low-voltage differential signal (LVDS) data streams and returns them to 48-bit LVCMOS/LVTTL data conversion. With a clock of 133MHz, the data throughput is 6.384 Gbit/s (798 Mbytes/s).
Data line multiplexing provides a significant reduction in cables. Long-distance parallel single-ended buses typically require a ground wire for each positive signal (with very limited noise suppression capabilities). Therefore, for a 48-bit wide data and clock, up to 98 conductors are required. With this channel link chipset number of conductors of 19 (8 data pairs, 1 clock pair and one ground minimum) is necessary. This provides an 80% reduction in interconnect width, which provides a system cost savings, reduces the physical size and cost of connectors, and reduces shielding requirements due to smaller form factors.
DS90CR486 deserializer is an improvement over previous generations of channel connection devices and offers higher bandwidth support and longer cable drivers with three areas of enhancement. Increased bandwidth, increased maximum clock rate to 133 MHz and 8 serialized LVDS outputs provide. The cable driver enhances the user-selectable pre-emphasis (upper DS90CR485) function to provide additional output current during the conversion process to counteract the cable load effect. Optional DC is also available for one-cycle balancing to reduce ISI (inter-code interference). With pre-emphasis and DC balancing, the low-distortion eye diagram is on the cable at the receiving end. The cable guidance function has been added to correct skew for long cable pairs. These enhancements allow for the drive of long cables.
DS90CR486 intended for DS90CR485 channel link serial. It is also backwards compatible with serialization DS90CR481 and DS90CR483. DS90CR486 compatible with DS90CR484 footprints.
This chipset is an ideal solution to solve the problem of point-to-point application size for EMI and interconnects for high throughput.
For more information, see the "Application Information" section of this datasheet.
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