ADSP-TS101SIt is the first member of the TigerSHARC processor family. Analog Devices' TigerSHARC processors target a wide range of signal processing applications that rely on multiple processors collaborating to perform computationally intensive real-time functions, making them ideal for the video and communications markets, including 3G cellular and broadband wireless base stations as well as defense, medical imaging, industrial instrumentation, and more. The ADSP-TS101S uses a static superscalar architecture with RISC, VLIW, and standard DSP functions. Built-in support for fixed-point and floating-point data types, combined with leading multiprocessing capabilities, gives TigerSHARC processors unmatched DSP performance. The ADSP-TS101S clocks at 300 MHz with the industry's highest 16-bit fixed-point performance and a 32-bit 1024 floating-point composite FFT time of 32.5 ms.
ADSP-TS101S Performance:
High performance 300MHz, 3.3ns instruction rate DSP core
Each cycle performs 8 16-bit MAC and 40-bit accumulations or 2 32-bit MAC and 80-bit accumulations
Perform 6 single-precision floating-point or 24 16-bit fixed-point operations per cycle (performance of 1800 MFLOPS or 7.2 GOPS)
8-cycle instruction pipeline; The 3-cycle pipeline and the 5-cycle execution pipeline are taken
The parallel design allows up to four 32-bit instructions to be executed per cycle
The ADSP-TS101S is available in 19mm x 19mm and 27mm ×27mm low cost plastic ball grid array packages. TigerSHARC currently offers a universal sampling version.