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AD9869BCPZRL
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AD9869BCPZRL

  • 所属类别:高速/宽带编解码器和模拟前端High-speed logic
  • 产品名称:宽带调制解调器混合信号前端
  • 厂商:Analog Devices
  • 生产批号:15+
  • 封装:64 ld LFCSP
  • 库存状态:有库存
  • 库存量:980
  • 最低订购量:1
  • 详细资料:点击查找AD9869BCPZRL的pdf资料
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  • Product Introduction

Advantages and features:

  • 低成本3.3 V CMOS MxFE,适合Broadband modem
  • 12位数模转换器 
    2×/4×插值滤波器 
    200 MSPS DAC更新速率
  • 集成17 dBm线路驱动器,具有19.5 dB增益控制范围
  • 12位、80 MSPS模数转换器
  • 三阶可编程低通滤波器
  • −12 dB至+48 dB低噪声RxPGA (
  • 灵活的数字数据路径接口 
    半双工和全双工操作
    与AD9866引脚兼容
    多种关断/省电模式
  • 内部时钟乘法器(PLL)
  • 2路辅助可编程时钟输出
  • 采用64引脚LFCSP_VQ封装
  • Product Details:

    The AD9869 is a mixed-signal front-end (MxFE)® IC for transceiver applications that require both transmit and receive path capabilities with data rates up to 80 MSPS. The device is a low-cost, pin-compatible version of the AD9866 that removes the current amplifier (IAMP) IOUTP function and limits the PLL VCO operating frequency range to 80 MHz to 200 MHz.


    The device is ideal for both half-duplex and full-duplex applications. The AD9869 is often used to replace discrete ADC and DAC solutions because it is extremely flexible and can be easily interfaced with a digital backend that supports half-duplex or full-duplex data transfer. Power saving mode reduces power consumption for individual function modules or shuts down unused modules in half-duplex applications. The Serial Port Interface (SPI) allows software programming of many functional modules. The on-chip PLL clock multiplier and frequency synthesizer provide all the required internal clocks, as well as external clocks for single oscillators or clock sources.


    The transmit signal path consists of a 2×/4× low-pass interpolation filter, a 12-bit TxDAC, and a line driver. The transmit path signal bandwidth can be as high as 34 MHz at an input data rate of 80 MSPS. The TxDAC provides a differential current output that can be directed directly to an external load or to an internal low-distortion current amplifier (IAMP), which is capable of delivering 17 dBm peak signal power. The transmit power can be digitally controlled with a range of 19.5 dB and a step of 0.5 dB.

    The receive path consists of a programmable amplifier (RxPGA), a tunable low-pass filter (LPF), and a 12-bit ADC. The low-noise RxPGA has a programmable gain range of −12 dB to +48 dB in 1 dB steps; For gain settings above 36 dB, it translates to less than 3 nV/√Hz of noise at the input. The receiver path LPF cut-off frequency can be set in the range of 15 MHz to 35 MHz or simply bypassed. The 12-bit ADC can achieve excellent dynamic performance in the range of up to 80 MSPS. Both RxPGA and ADC provide adjustable power consumption for power/performance optimization.


    The AD9869 can provide a highly integrated solution for many broadband modems. It is available in a space-saving 16-pin LFCSP package and is rated for a commercial temperature range of −40°C to +85°C.


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