Key features
1.15GHz analog input bandwidth
90fs clock jitter
Finely interwoven automatic correction markers
Time from multiple chips, supported by a synchronous clock divider reset alignment
Programmable gain, offset and offset control
Out-of-range indicator
Clock phase selection
Snooze and sleep patterns
2 in complement, gray code or binary data format
DDR LVDS compatible or LVCMOS output
Programmable test mode and internal temperature sensor
description
The ISLA112P50 is a low-power, high-performance, 500MSPS analog-to-digital converter designed with Intersil's proprietary FemtoCharge ™ technology standard CMOS process. The ISLA112P50 is part of a pin-compatible portfolio of 8-, 10- and 12-bit A/D conversions. This device is an upgrade and similar pin of the KAD551XP-50 product family. The device uses two time-interleaved 250MSPS cell A/D conversions to achieve a final sample rate of 500MSPS. A single 500MHz conversion clock converter with internal management of all interleaved clocks. Intersil's proprietary alternating engine (I2E) performs A/D conversion of mismatches between offset offset, gain and sample time skewed units to optimize performance for excellent automatic correction. No external interleaving algorithm is required. A serial peripheral interface (SPI) port allows for a wide range of configurable A/D SPIs that also control interleaved correction circuitry, enabling the system to issue continuous calibration commands, as well as many dynamic parameter configurations. Digital output data can be selected in LVDS or CMOS format. The ISLA112P50 is available in a 72 LD QFN package with exposed pads. Performance is specified over the entire industrial temperature range (-40°C to +85°C).