Key features
Programmable gain, offset and tilt controls
1.3GHz analog input bandwidth
60fs clock jitter
Out-of-range indicator
Optional clock divider: ÷1÷2
Clock phase selection
Snooze and sleep patterns
2 in complement, gray code or binary data format
DDR LVDS compatible or LVCMOS output
Programmable built-in test modes
1.8V single-supply operation
Lead-free (RoHS compliant) main specifications
65.9dBFS signal-to-noise ratio f = 105MHz (-1dBFS)
SFDR = 82.0dBc for f IN = 105MHz (-1dBFS)
Total power consumption = 432mW
description
The KAD5512P-50 is a low-power, high-performance, 12-bit, 500MSPS analog-to-digital converter designed on a standard CMOS process technology on Intersil's proprietary FemtoCharge™. The KAD5512P-50 is part of a pin-compatible portfolio of 10, 12 and 14-bit A/D conversion sample rates from 125 MSPS to 500 MSPS. The device uses two time-interleaved 12-bit, 250Msps A/D conversion cores to achieve a final sample rate of 500MSPS. Single 500MHz conversion clock converter, all interleaved clocks are managed internally. The serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of the matching characteristics of the conversion core between the two (gain, offset, skew). These adjustments allow users to minimize spurs associated with intertwined processes. The digital output data can be selected in LVDS or CMOS format. The KAD5512P-50 is available in a 72-contact QFN package with exposed pads. Performance is specified over the entire industrial temperature range (-40°C to +85°C).