peculiarity
> switching frequency of 400 Mbps (200 MHz).
0.1 nanosecond typical differential offset
0.4 ns maximum differential offset
Maximum propagation delay of 2.0 ns
3.3V power supply design
± 350 mV differential signal
Low Power Consumption (3.3V Static 13MW)
It can be used with existing 5V LVDS devices
Compliant with IEEE 1596.3 SCI LVDS standard
Compatible with TIA/EIA-644 LVDS standards
Industrial operating temperature range
Available in SOIC and TSSOP surface mount packaging
illustrate
DS90LV031A is a quad CMOS differential line driver designed for applications that require ultra-low power consumption and high data rates. The device is designed to support data transfer rates in excess of 400 Mbps utilizing low-voltage differential signaling (LVDS) technology (200 MHz).
DS90LV031A accept low-voltage LVTTL/LVCMOS input levels and convert them to low-voltage (350 mV) differential output signals. In addition, the driver supports a three-state function that can be used to disable the output stage, disabling the load current, thereby discarding the typical state of the device's ultra-low idle power consumption of 13 mW.
The EN and EN inputs allow for low level or three-state output high control. Able to achieve common all four drivers. DS90LV031A and companion line receivers (DS90LV032A), high power provides a new alternative to pseudo-ECL devices for point-to-point high-speed interface applications.