- Exceeds LV and HV CPRI voltage and jitter requirements
- 2457.6, 1228.8, and 614.4 Mbps operations
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Integrated Delay Calibration Measurement (DCM) directly measures delay at T14 and toffset ≤ ± 800 PS
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DCM also measures chips and other delays ≤ PS accuracy± 1200
- Deterministic chip delay
- Independent transmission and reception seamless RE-synchronous phase-locked loop
- Low noise recovery clock output
- No need for single tap or jitter for cleaning
- > 8 kV ESD to CML IO, > 7 kV for all other pins, > 2 kV clean development mechanism
- Hot-swappable protection
- LOS, LOF, violation of 8B/10B line coding, comma, and receiver PLL lock report
- Programmable hyperframe length and the start of hyperframe characters
- Programmable transmit de-weighting and receive with on-chip terminal equalization
- Advanced measurability features
- IEEE 1149.1 and 1149.6
- High-speed BIST mode generator/veribrator
- Multi-loop mode
- 1.8V or 3.3V compatible parallel bus interfaces
- 100-pin TQFP package with exposed DAP
- Industrial -40 to +85°C temperature range
illustrate
This SCAN25100 is high-speed bidirectional serial data at 2457.6, 1228.8, and 614.4 Mbps on the backplane of the FR-4 printed circuit board, balancing cables, and fiber transmission serializer/deseralizer (SerDes). SCAN25100 integrated high-precision delay calibration measurement (DCM) circuit, the measure link delay components are more accurate than those of ± 800 ps.
SCAN25100 features an independent transmission and reception system phase-locked loop, on-chip oscillator, and intelligent clock management circuit, automatically executing remote radio head synchronization, reducing costs and reducing the complexity of external clock networks.
Although the SCAN25100 is MDIO interface programming and pin control, it features configurable transmit de-emphasizing, receive equalization, high-speed rate selection, internal pattern generation/validation, and loopback modes. In addition to high-speed BIST SCAN25100 it includes IEEE 1149.1 and 1149.6 testability.
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